Datasheet4U Logo Datasheet4U.com

SN74AHC125-Q1 - QUADRUPLE BUS BUFFER GATE

General Description

The SN74AHC125 is a quadruple bus buffer gate featuring independent line drivers with 3-state outputs.

Each output is disabled when the associated output-enable (OE) input is high.

When OE is low, the respective gate passes the data from the A input to its Y output.

📥 Download Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
DQualified for Automotive Applications DESD Protection Exceeds 1000 V Per MIL-STD-883, Method 3015; Exceeds 150 V Using Machine Model (C = 200 pF, R = 0) DEPIC (Enhanced-Performance Implanted CMOS) Process DOperating Range 2-V to 5.5-V VCC DLatch-Up Performance Exceeds 250 mA Per JESD 17 SN74AHC125-Q1 QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS SCLS525A − AUGUST 2003 − REVISED APRIL 2008 D OR PW PACKAGE (TOP VIEW) 1OE 1A 1Y 2OE 2A 2Y GND 1 2 3 4 5 6 7 14 VCC 13 4OE 12 4A 11 4Y 10 3OE 9 3A 8 3Y description/ordering information The SN74AHC125 is a quadruple bus buffer gate featuring independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is high.