Datasheet Summary
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET
SCLS495- JUNE 2003
D Controlled Baseline
- One Assembly/Test Site, One Fabrication
Site
D Extended Temperature Performance of
- 55°C to 125°C
D Enhanced Diminishing Manufacturing
Sources (DMS) Support
D Enhanced Product-Change Notification D Qualification Pedigree† D Inputs Are TTL-Voltage patible D EPIC (Enhanced-Performance Implanted
CMOS) Process
D Latch-Up Performance Exceeds 250 mA Per
JESD 17
D ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
† ponent qualification in accordance with JEDEC and industry standards to ensure reliable...