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SN74AUC1G02 Datasheet Preview

SN74AUC1G02 Datasheet

SINGLE 2-INPUT POSITIVE-NOR GATE

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SN74AUC1G02
SINGLE 2-INPUT POSITIVE-NOR GATE
SCES369P – SEPTEMBER 2001 – REVISED MARCH 2007
FEATURES
Available in the Texas Instruments
NanoFree™ Package
Optimized for 1.8-V Operation and Is 3.6-V I/O
Tolerant to Support Mixed-Mode Signal
Operation
Ioff Supports Partial-Power-Down Mode
Operation
Sub-1-V Operable
Max tpd of 2.4 ns at 1.8 V
Low Power Consumption, 10-µA Max ICC
• ±8-mA Output Drive at 1.8 V
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
DBV PACKAGE
(TOP VIEW)
DCK PACKAGE
(TOP VIEW)
DRL PACKAGE
(TOP VIEW)
YZP PACKAGE
(BOTTOM VIEW)
A
1
B
2
5
VCC
A1
B2
5
VCC
A1
B2
5 VCC GND 3 4 Y
B2
GND 3
4Y
A 1 5 VCC
GND 3
4Y
GND
3
4
Y
See mechanical drawings for dimensions.
DESCRIPTION/ORDERING INFORMATION
This single 2-input positive-NOR gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V
to 1.95-V VCC operation.
The SN74AUC1G02 performs the Boolean function Y = A + B or Y = AB in positive logic.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the
package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
For more information about AUC Little Logic devices, please refer to the TI application report, Applications of
Texas Instruments AUC Sub-1-V Little Logic Devices, literature number SCEA027.
TA
–40°C to 85°C
ORDERING INFORMATION
PACKAGE (1)
ORDERABLE PART NUMBER TOP-SIDE MARKING(2)
NanoFree™ – WCSP (DSBGA)
0.23-mm Large Bump – YZP (Pb-free)
Reel of 3000
SN74AUC1G02YZPR
_ _ _UB_
SOT (SOT-23) – DBV
Reel of 3000 SN74AUC1G02DBVR
U02_
SOT (SC-70) – DCK
Reel of 3000 SN74AUC1G02DCKR
UB_
SOT (SOT-553) – DRL
Reel of 4000 SN74AUC1G02DRLR
UB_
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(2) DBV/DCK/DRL: The actual top-side marking has one additional character that designates the assembly/test site.
YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, = Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoFree is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2001–2007, Texas Instruments Incorporated




etcTI

SN74AUC1G02 Datasheet Preview

SN74AUC1G02 Datasheet

SINGLE 2-INPUT POSITIVE-NOR GATE

No Preview Available !

SN74AUC1G02
SINGLE 2-INPUT POSITIVE-NOR GATE
SCES369P – SEPTEMBER 2001 – REVISED MARCH 2007
FUNCTION TABLE
INPUTS
A
B
H
X
X
H
L
L
OUTPUT
Y
L
L
H
LOGIC DIAGRAM (POSITIVE LOGIC)
1
A
2
B
4
Y
www.ti.com
Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
VCC
Supply voltage range
VI
Input voltage range(2)
Voltage range applied to any output in the high-impedance or power-off state(2)
VO
Output voltage range(2)
IIK
Input clamp current
IOK
Output clamp current
IO
Continuous output current
Continuous current through VCC or GND
VI < 0
VO < 0
DBV package
θJA
Package thermal impedance(3)
DCK package
DRL package
YZP package
Tstg
Storage temperature range
MIN
–0.5
–0.5
– 0.5
–0.5
.
–65
MAX
3.6
3.6
3.6
VCC + 0.5
–50
–50
±20
±100
206
252
142
132
150
UNIT
V
V
V
mA
mA
mA
mA
°C/W
°C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The package thermal impedance is calculated in accordance with JESD 51-7.
2
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Part Number SN74AUC1G02
Description SINGLE 2-INPUT POSITIVE-NOR GATE
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