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SN74AUC2G32 - DUAL 2-INPUT POSITIVE-OR GATE

General Description

This dual 2-input positive-OR gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation.

The SN74AUC2G32 performs the Boolean function Y = A + B or Y = A × B in positive logic.

Key Features

  • Available in the Texas Instruments NanoFree™ Package.
  • Optimized for 1.8-V Operation and is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation.
  • Ioff Supports Partial-Power-Down Mode Operation.
  • Sub-1-V Operable.
  • Max tpd of 1.5 ns at 1.8 V.
  • Low Power Consumption, 10 µA at 1.8 V.
  • ±8-mA Output Drive at 1.8 V.
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II.
  • ESD Protection Exceeds JESD 22.
  • 200.

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Full PDF Text Transcription for SN74AUC2G32 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for SN74AUC2G32. For precise diagrams, and layout, please refer to the original PDF.

www.ti.com SN74AUC2G32 DUAL 2-INPUT POSITIVE-OR GATE SCES478C – AUGUST 2003 – REVISED JANUARY 2007 FEATURES • Available in the Texas Instruments NanoFree™ Package • Optim...

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EATURES • Available in the Texas Instruments NanoFree™ Package • Optimized for 1.8-V Operation and is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation • Ioff Supports Partial-Power-Down Mode Operation • Sub-1-V Operable • Max tpd of 1.5 ns at 1.8 V • Low Power Consumption, 10 µA at 1.8 V • ±8-mA Output Drive at 1.

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SN74AUC2G07 Dual Buffer/Driver
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