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SN74AUP1G34 Datasheet

Low-Power Single Buffer Gate

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SN74AUP1G34
SCES603K – AUGUST 2004 – REVISED OCTOBER 2014
SN74AUP1G34 Low-Power Single Buffer Gate
1 Features
1 Available in the Ultra Small 0.64 mm2 Package
(DPW) with 0.5-mm Pitch
• Low Static-Power Consumption;
ICC = 0.9 μA Max
• Low Dynamic-Power Consumption;
Cpd = 4.1 pF Typ at 3.3 V
• Low Input Capacitance; Ci = 1.5 pF Typ
• Low Noise - Overshoot and Undershoot <
10% of VCC
• Ioff Supports Live Insertion, Partial Power Down
Mode, and Back Drive Protection
• Input Hysteresis Allows Slow Input Transition and
Better Switching Noise Immunity at the Input
(Vhys = 250 mV Typ at 3.3 V)
• Wide Operating VCC Range of 0.8 V to 3.6 V
• Optimized for 3.3-V Operation
• 3.6-V I/O Tolerant to Support Mixed-Mode
Signal Operation
• tpd = 4.1 ns Max at 3.3 V
• Suitable for Point-to-Point Applications
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Performance Tested Per JESD 22
– 2000-V Human-Body Model
(A114-B, Class II)
– 1000-V Charged-Device Model (C101)
2 Applications
• ATCA Solutions
• Active Noise Cancellation (ANC)
• Barcode Scanner
• Blood Pressure Monitor
• CPAP Machine
• Cable Solutions
• DLP 3D Machine Vision, Hyperspectral Imaging,
Optical Networking, and Spectroscopy
• E-Book
• Embedded PC
• Field Transmitter: Temperature or Pressure
Sensor
• Fingerprint Biometrics
• HVAC: Heating, Ventilating, and Air Conditioning
• Network-Attached Storage (NAS)
• Server Motherboard and PSU
• Software Defined Radio (SDR)
• TV: High-Definition (HDTV), LCD, and Digital
• Video Communications System
• Wireless Data Access Card, Headset, Keyboard,
Mouse, and LAN Card
• X-ray: Baggage Scanner, Medical, and Dental
3 Description
This single buffer gate performs the Boolean function
Y = A in positive logic.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
SOT (5)
1.60 mm × 1.20 mm
SN74AUP1G34
USON (6)
X2SON (4)
1.45 mm × 1.00 mm
0.80 mm × 0.80 mm
DSBGA (4)
0.79 mm × 0.79 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
4 Simplifed Schematic
A
Y
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.




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SN74AUP1G34 Datasheet Preview

SN74AUP1G34 Datasheet

Low-Power Single Buffer Gate

No Preview Available !

SN74AUP1G34
SCES603K – AUGUST 2004 – REVISED OCTOBER 2014
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Simplifed Schematic.............................................. 1
5 Revision History..................................................... 2
6 Pin Configuration and Function ........................... 3
7 Specifications......................................................... 3
7.1 Absolute Maximum Ratings ..................................... 3
7.2 Handling Ratings....................................................... 4
7.3 Recommended Operating Conditions ...................... 4
7.4 Thermal Information .................................................. 4
7.5 Electrical Characteristics........................................... 5
7.6 Switching Characteristics, CL = 5 pF ........................ 5
7.7 Switching Characteristics, CL = 10 pF ...................... 6
7.8 Switching Characteristics, CL = 15 pF ...................... 6
7.9 Switching Characteristics, CL = 30 pF ...................... 6
7.10 Operating Characteristics........................................ 6
7.11 Typical Characteristics ............................................ 7
8 Parameter Measurement Information .................. 8
8.1 Propagation Delays, Setup and Hold Times, and
Pulse Width................................................................ 8
8.2 Enable and Disable Times ....................................... 9
9 Detailed Description ............................................ 10
9.1 Overview ................................................................. 10
9.2 Functional Block Diagram ....................................... 10
9.3 Feature Description................................................. 10
9.4 Device Functional Modes........................................ 10
10 Application and Implementation........................ 11
10.1 Application Information.......................................... 11
10.2 Typical Application ............................................... 11
11 Power Supply Recommendations ..................... 12
12 Layout................................................................... 12
12.1 Layout Guidelines ................................................. 12
12.2 Layout Example .................................................... 12
13 Device and Documentation Support ................. 13
13.1 Trademarks ........................................................... 13
13.2 Electrostatic Discharge Caution ............................ 13
13.3 Glossary ................................................................ 13
14 Mechanical, Packaging, and Orderable
Information ........................................................... 13
5 Revision History
Changes from Revision J (June 2014) to Revision K
Page
• Updated Device Information table. ........................................................................................................................................ 1
Changes from Revision I (November 2012) to Revision J
Page
• Updated document to new TI data sheet format. ................................................................................................................... 1
• Deleted Ordering Information table. ...................................................................................................................................... 1
• Updated Description. ............................................................................................................................................................. 1
• Added Device Information table. ........................................................................................................................................... 1
• Added Handling Ratings table. ............................................................................................................................................... 4
• Added Thermal Information table. .......................................................................................................................................... 4
• Added Typical Characteristics. ............................................................................................................................................... 7
Changes from Revision H (October 2012) to Revision I
Page
• Changed DPW package pinout .............................................................................................................................................. 3
2
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Copyright © 2004–2014, Texas Instruments Incorporated
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Part Number SN74AUP1G34
Description Low-Power Single Buffer Gate
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