SN74AUP1G32 Overview
This single 2-input positive-OR gate performs the Boolean function Y = A · B or Y = A +B in positive logic. A Y B Simplified Schematic An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, Copyrighint t©el2le0c2t0uTael xparsoIpnesrtrtuymmeanttsteIrnscoarnpdoraottehder important disclaimers. Submit Document Feedback 1 SN74AUP1G32 SCES580K...
SN74AUP1G32 Key Features
- Available in the ultra-small 0.64 mm2 package (DPW) with 0.5-mm pitch
- Low static-power consumption (ICC = 0.9 µA Max)
- Low dynamic-power consumption (Cpd = 4.3 pF Typ at 3.3 V)
- Low input capacitance (CI = 1.5 pF Typ)
- Low noise
- overshoot and undershoot
- Ioff Supports live insertion, partial-power-down
- Input hysteresis allows slow input transition and better switching noise immunity at the input (Vhys = 250 mV typ at 3.3
- Wide operating VCC range of 0.8 V to 3.6 V
- Optimized for 3.3-V operation
SN74AUP1G32 Applications
- Latch-up performance exceeds 100 mA Per JESD 78, Class II
- ESD performance tested Per JESD 22