D Wide Operating Voltage Range of 2 V to 6 V
D High-Current 3-State Outputs Drive Bus
Lines Directly or Up To 15 LSTTL Loads
D Low Power Consumption, 80-µA Max ICC
SN54HC563 . . . J OR W PACKAGE
SN74HC563 . . . DW OR N PACKAGE
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCLS145C – DECEMBER 1982 – REVISED MARCH 2003
D Typical tpd = 21 ns
D ±6-mA Output Drive at 5 V
D Low Input Current of 1 µA Max
D Bus-Structured Pinout
SN54HC563 . . . FK PACKAGE
3 2 1 20 19
9 10 11 12 13
These 8-bit transparent D-type latches feature 3-state outputs designed specifically for driving highly capacitive
or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports,
bidirectional bus drivers, and working registers.
While the latch-enable (LE) input is high, the Q outputs follow the complements of the data (D) inputs. When
LE is taken low, the outputs are latched at the inverses of the levels set up at the D inputs.
A buffered output-enable (OE) input places the eight outputs in either a normal logic state (high or low logic
levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines
significantly. The high-impedance state and increased high logic level provide the capability to drive bus lines
without interface or pullup components.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
OE does not affect internal operations of the latches. Old data can be retained or new data can be entered while
the outputs are in the high-impedance state.
PDIP – N
–40°C to 85°C
SOIC – DW
Tape and reel
CDIP – J
–55°C to 125°C CFP – W
LCCC – FK
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
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