SN74HC573A-Q1 Overview
Key Features
- 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads
- It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers
- While the latch-enable (LE) input is high, the Q outputs respond to the data (D) inputs
- When LE is low, the outputs are latched to retain the data that was set up
- In the high-impedance state, the outputs neither load nor drive the bus lines significantly
- The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components
- OE does not affect the internal operations of the latches
- Old data can be retained or new data can be entered while the outputs are in the high-impedance state
