900,000+ datasheet pdf search and download

Datasheet4U offers most rated semiconductors data sheet pdf






etcTI

SN74HC573A-Q1 Datasheet Preview

SN74HC573A-Q1 Datasheet

Octal Transparent D-Type Latche

No Preview Available !

D Qualified for Automotive Applications
D Wide Operating Voltage Range of 2 V to 6 V
D High-Current 3-State Outputs Drive Bus
Lines Directly or up to 15 LSTTL Loads
D Low Power Consumption, 80-µA Max ICC
D Typical tpd = 21 ns
D ±6-mA Output Drive at 5 V
D Low Input Current of 1 µA Max
D Bus-Structured Pinout
description/ordering information
SN74HC573AĆQ1
OCTAL TRANSPARENT DĆTYPE LATCH
WITH 3ĆSTATE OUTPUTS
SCLS600A − NOVEMBER 2004 − REVISED APRIL 2008
DW OR PW PACKAGE
(TOP VIEW)
OE 1
1D 2
2D 3
3D 4
4D 5
5D 6
6D 7
7D 8
8D 9
GND 10
20 VCC
19 1Q
18 2Q
17 3Q
16 4Q
15 5Q
14 6Q
13 7Q
12 8Q
11 LE
This octal transparent D-type latch features 3-state outputs designed specifically for driving highly capacitive
or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports,
bidirectional bus drivers, and working registers.
While the latch-enable (LE) input is high, the Q outputs respond to the data (D) inputs. When LE is low, the
outputs are latched to retain the data that was set up.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high
or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive
the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines
without interface or pullup components.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
ORDERING INFORMATION{
TA
PACKAGE‡
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
SOIC − DW
−40°C to 125°C
TSSOP − PW
Reel of 2500
Reel of 2000
SN74HC573AQDWRQ1 HC573AQ
SN74HC573AQPWRQ1 HC573AQ
For the most current package and ordering information, see the Package Option Addendum at the end
of this document, or see the TI web site at http://www.ti.com.
Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright 2008, Texas Instruments Incorporated
1




etcTI

SN74HC573A-Q1 Datasheet Preview

SN74HC573A-Q1 Datasheet

Octal Transparent D-Type Latche

No Preview Available !

SN74HC573AĆQ1
OCTAL TRANSPARENT DĆTYPE LATCH
WITH 3ĆSTATE OUTPUTS
SCLS600A − NOVEMBER 2004 − REVISED APRIL 2008
FUNCTION TABLE
(each latch)
INPUTS
OE LE
D
OUTPUT
Q
L
H
H
H
L
H
L
L
L
L
X
Q0
H
X
X
Z
logic diagram (positive logic)
1
OE
11
LE
C1
2
1D
1D
19
1Q
To Seven Other Channels
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±35 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±70 mA
Package thermal impedance, θJA (see Note 2): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265



Part Number SN74HC573A-Q1
Description Octal Transparent D-Type Latche
Maker etcTI
Total Page 3 Pages
PDF Download

SN74HC573A-Q1 Datasheet PDF





Similar Datasheet

1 SN74HC573A-Q1 Octal Transparent D-Type Latche
etcTI





Part Number Start With

0    1    2    3    4    5    6    7    8    9    A    B    C    D    E    F    G    H    I    J    K    L    M    N    O    P    Q    R    S    T    U    V    W    X    Y    Z

Site map

Webmaste! click here

Contact us

Buy Components

Privacy Policy