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SN74LVC00A Datasheet Preview

SN74LVC00A Datasheet

Quadruple 2-Input Positive-NAND Gate

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SN54LVC00A, SN74LVC00A
SCAS279R – JANUARY 1993 – REVISED FEBRUARY 2016
SNx4LVC00A Quadruple 2-Input Positive-NAND Gates
1 Features
1 Operate From 1.65 V to 3.6 V
• Specified From –40°C to 85°C, –40°C to 125°C,
and –55°C to 125°C
• Inputs Accept Voltages to 5.5 V
• Max tpd of 4.3 ns at 3.3 V
• Typical VOLP (Output Ground Bounce)
< 0.8 V at VCC = 3.3 V, TA = 25°C
• Typical VOHV (Output VOH Undershoot)
> 2 V at VCC = 3.3 V, TA = 25°C
• Latch-Up Performance Exceeds 250 mA
Per JESD 17
• On Products Compliant to MIL-PRF-38535,
All Parameters Are Tested Unless Otherwise
Noted. On All Other Products, Production
Processing Does Not Necessarily Include Testing
of All Parameters.
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model
– 200-V Machine Model
– 1000-V Charged-Device Model
2 Applications
• AV Receivers
• Audio Docks: Portable
• Blu-ray Players and Home Theater
• MP3 Players or Recorder s
• Personal Digital Assistants (PDAs)
• Power: Telecom/Server AC/DC Supply: Single
Controller: Analog and Digital
• Solid State Drives (SSDs): Client and Enterprise
• TVs: LCD, Digital, and High-Definition (HDTV)
• Tablets: Enterprise
• Video Analytics: Server
• Wireless Headsets, Keyboards, and Mice
3 Description
The SN54LVC00A quadruple 2-input positive-NAND
gate is designed for 2.7-V to 3.6-V VCC operation, and
the SN74LVC00A quadruple 2-input positive-NAND
gate is designed for 1.65-V to 3.6-V VCC operation.
The SNx4LVC00A devices perform the Boolean
function Y = A × B or Y = A + B in positive logic.
Inputs can be driven from either 3.3-V or 5-V devices.
This feature allows the use of these devices as
translators in a mixed 3.3-V/5-V system environment.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
SOIC (14)
8.65 mm × 3.91 mm
SSOP (14)
6.20 mm × 5.30 mm
SNx4LVC00A
SOP (14)
10.30 mm × 5.30 mm
TSSOP (14)
5.00 mm × 4.40 mm
VQFN (14)
3.50 mm × 3.50 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
4 Simplified Schematic
A
Y
B
A
Y
B
A
Y
B
A
Y
B
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.




etcTI

SN74LVC00A Datasheet Preview

SN74LVC00A Datasheet

Quadruple 2-Input Positive-NAND Gate

No Preview Available !

SN54LVC00A, SN74LVC00A
SCAS279R – JANUARY 1993 – REVISED FEBRUARY 2016
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Simplified Schematic............................................. 1
5 Revision History..................................................... 2
6 Pin Configuration and Functions ......................... 3
7 Specifications......................................................... 4
7.1 Absolute Maximum Ratings ..................................... 4
7.2 ESD Ratings ............................................................ 4
7.3 Recommended Operating Conditions, SN54LVC00A
................................................................................... 5
7.4 Recommended Operating Conditions, SN74LVC00A
................................................................................... 5
7.5 Thermal Information .................................................. 6
7.6 Electrical Characteristics, SN54LVC00A .................. 6
7.7 Electrical Characteristics, SN74LVC00A .................. 6
7.8 Switching Characteristics, SN54LVC00A ................. 7
7.9 Switching Characteristics, SN74LVC00A ................. 7
7.10 Operating Characteristics........................................ 7
7.11 Typical Characteristics ............................................ 7
8 Parameter Measurement Information .................. 8
9 Detailed Description .............................................. 9
9.1 Overview ................................................................... 9
9.2 Functional Block Diagram ......................................... 9
9.3 Feature Description................................................... 9
9.4 Device Functional Modes.......................................... 9
10 Application and Implementation........................ 10
10.1 Application Information.......................................... 10
10.2 Typical Application ............................................... 10
11 Power Supply Recommendations ..................... 11
12 Layout................................................................... 11
12.1 Layout Guidelines ................................................. 11
12.2 Layout Example .................................................... 11
13 Device and Documentation Support ................. 12
13.1 Related Links ........................................................ 12
13.2 Trademarks ........................................................... 12
13.3 Electrostatic Discharge Caution ............................ 12
13.4 Glossary ................................................................ 12
14 Mechanical, Packaging, and Orderable
Information ........................................................... 12
5 Revision History
Changes from Revision Q (December 2014) to Revision R
Page
• Added Junction temperature row to Absolute Maximum Ratings table.................................................................................. 4
• Changed statement of "open drain: to "maximum sink and source current" statement in Overview of Detailed
Description section ................................................................................................................................................................. 9
• Deleted "open drain" from Application Information section .................................................................................................. 10
Changes from Revision P (July 2005) to Revision Q
Page
• Added Applications, Device Information table, Pin Functions table, ESD Ratings table, Thermal Information table,
Typical Characteristics, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section. ................................................................................................. 1
• Deleted Ordering Information table. ....................................................................................................................................... 1
• Added Military Disclaimer to Features.................................................................................................................................... 1
2
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Copyright © 1993–2016, Texas Instruments Incorporated
Product Folder Links: SN54LVC00A SN74LVC00A



Part Number SN74LVC00A
Description Quadruple 2-Input Positive-NAND Gate
Maker etcTI
Total Page 3 Pages
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