| Part number | SNJ54HC109J |
|---|---|
| Datasheet | SNJ54HC109J-etcTI.pdf |
| File Size | 1.08 MB |
| Manufacturer | Texas Instruments |
| Description | DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS |
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/ordering information These devices contain two independent J-K positive-edge-triggered flip-flops. A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the J and K inputs meeting the setup-time requirements are transferred to the outputs on the positive-going edge of the clock (CLK) pulse.
See all Texas Instruments datasheets
| Part Number | Description |
|---|---|
| SNJ54HC109FK | DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS |
| SNJ54HC109W | DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS |
| SNJ54HC10FK | TRIPLE 3-INPUT POSITIVE-NAND GATES |
| SNJ54HC10J | TRIPLE 3-INPUT POSITIVE-NAND GATES |
| SNJ54HC10W | TRIPLE 3-INPUT POSITIVE-NAND GATES |
| SNJ54HC112FK | DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS |
| SNJ54HC112J | DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS |
| SNJ54HC112W | DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS |
| SNJ54HC148FK | 8-LINE TO 3-LINE PRIORITY ENCODERS |
| SNJ54HC148J | 8-LINE TO 3-LINE PRIORITY ENCODERS |
