TMS320C6701 Datasheet | Texas Instruments

Features - Hardware Support for IEEE Single-Precision Instructions - Hardware Support for IEEE Double-Precision Instructions - Byte-Addressable (8-, 16-, 32-Bit Data) - 8-Bit Overflow Protection - Saturation - Bit-Field Extract, Set, Clear - Bit-Counting - Normalization D 1M-Bit On-Chip SRAM - 512K-Bit Internal Program/Cache (16K 32-Bit Instructions) - 512K-Bit Dual-Access Internal Data (64K Bytes) D 32-Bit External Memory Interface (EMIF) - Glueless Interface to Synchronous Memories: SDRAM and SBSRAM - Glueless Interface to Asynchronous Memories: SRAM and EPROM - 52M-Byte Addressable External Memory Space D Four-Channel Bootloading Direct-Memory-Access (DMA) Controller With an Auxiliary Channel SPRS067F - MAY 1998 - REVISED MARCH 2004 GJC (352-PIN BGA) PACKAGE ( BOTTOM VIEW ) A B C D E F G H J K L M N P R T U V W Y AA AB AC AD AE AF D 16-Bit Host-Port Interface (HPI) - Access to Entire Memory Map D Two Multichannel Buffered Serial Ports (Mc BSPs) - Direct Interface to T1/E1, MVIP, SCSA Framers - ST-Bus-Switching patible - Up to 256 Channels Each - AC97-patible - Serial-Peripheral-Interface (SPI) patible (Motorola) D Two 32-Bit General-Purpose Timers D Flexible Phase-Locked-Loop (PLL) Clock Generator D IEEE-1149.1 (JTAG†) Boundary-Scan-patible D 352-Pin Ball Grid Array (BGA)...