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TMS418160A Datasheet Preview

TMS418160A Datasheet

DYNAMIC RANDOM-ACCESS MEMORIES

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This data sheet is applicable to TMS418160As
symbolized by Revision “E” and subsequent
revisions as described in the device
symbolization section.
D Organization . . . 1 048576 by 16 Bits
D Single 5-V Power Supply (± 10% Tolerance)
D 1 024-Cycle Refresh in 16 ms
D Performance Ranges:
ACCESS ACCESS ACCESS
TIME TIME TIME
tRAC tCAC tAA
MAX MAX MAX
READ/
WRITE
CYCLE
MIN
’418160A-50 50 ns 13 ns 25 ns
90 ns
’418160A-60 60 ns 15 ns 30 ns
110 ns
’418160A-70 70 ns 18 ns 35 ns
130 ns
D Enhanced Page-Mode Operation With
xCAS-Before-RAS ( xCBR) Refresh
D 3-State Unlatched Output
D Low Power Dissipation
D High-Reliability Plastic 42-Lead
400-Mil-Wide Surface-Mount Small-Outline
J-Lead (SOJ) Package (DZ Suffix)
D Ambient Temperature Range
0°C to 70°C
description
The TMS418160A is a 16 777 216-bit dynamic
random-access memory (DRAM) device orga-
nized as 1 048 576 words of 16 bits. It employs
state-of-the-art technology for high performance,
reliability, and low power at low cost.
This device features maximum RAS access times
of 50-, 60-, and 70 ns. All address and data-in lines
are latched on chip to simplify system design.
Data out is unlatched to allow greater system
flexibility.
The TMS418160A is offered in a 42-lead plastic
surface-mount SOJ package (DZ suffix). This
package is designed for operation from 0° to 70°C.
TMS418160A
1048576 BY 16-BIT
DYNAMIC RANDOM-ACCESS MEMORY
SMKS891C – AUGUST 1996 – REVISED OCTOBER 1997
DZ PACKAGE
( TOP VIEW )
VDD
DQ0
DQ1
DQ2
DQ3
VDD
DQ4
DQ5
DQ6
DQ7
NC
NC
W
RAS
NC
NC
A0
A1
A2
A3
VDD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
42 VSS
41 DQ15
40 DQ14
39 DQ13
38 DQ12
37 VSS
36 DQ11
35 DQ10
34 DQ9
33 DQ8
32 NC
31 LCAS
30 UCAS
29 OE
28 A9
27 A8
26 A7
25 A6
24 A5
23 A4
22 VSS
A[0 :9]
DQ[0:15]
LCAS
UCAS
NC
OE
RAS
VDD
VSS
W
PIN NOMENCLATURE
Address Inputs
Data In / Data Out
Lower Column-Address Strobe
Upper Column-Address Strobe
No Internal Connection
Output Enable
Row-Address Strobe
5-V Supply
Ground
Write Enable
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 1997, Texas Instruments Incorporated
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443
1




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TMS418160A Datasheet Preview

TMS418160A Datasheet

DYNAMIC RANDOM-ACCESS MEMORIES

No Preview Available !

TMS418160A
1048576 BY 16-BIT
DYNAMIC RANDOM-ACCESS MEMORY
SMKS891C – AUGUST 1996 – REVISED OCTOBER 1997
logic symbol
A0 17
A1 18
A2 19
A3 20
A4 23
A5 24
25
A6
A7 26
A8 27
28
A9
RAM 1M × 16
20D10/21D0
A
1
0
048
575
20D19/21D9
RAS 14
LCAS 31
C20[ROW]
G23/[REFRESH ROW]
24[PWR DWN]
C21
G24
&
23C22
31
UCAS 30
W 13
OE 29
DQ0 2
DQ1 3
DQ2 4
DQ3 5
DQ4 7
DQ5 8
DQ6 9
DQ7 10
DQ8 33
DQ9 34
DQ10 35
DQ11 36
DQ12 38
DQ13 39
DQ14 40
DQ15 41
C21
G34
&
31
Z31
23,21D
25
A,22D
26,27
23C32
24,25EN27
34,25EN37
A, Z26
A,32D
36,37
A, Z36
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
2 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443


Part Number TMS418160A
Description DYNAMIC RANDOM-ACCESS MEMORIES
Maker etcTI
Total Page 24 Pages
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