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TPIC5203 - power DMOS array

General Description

NC − No internal connection The TPIC5203 is a monolithic gate-protected power DMOS array that consists of two independent electrically isolated N-channel enhancement-mode DMOS transistors.

Each transistor

Overview

ą TPIC5203 2ĆCHANNEL INDEPENDENT GATEĆPROTECTED POWER DMOS ARRAY SLIS040 − SEPTEMBER 1994 • Low rDS(on) .

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Key Features

  • integrated high-current zener diodes (ZCXa and ZCXb) to prevent gate damage in the event that an overstress condition occurs. These zener diodes also provide up to 4000 V of ESD protection when tested using the human-body model of a 100-pF capacitor in series with a 1.5-kΩ resistor. The TPIC5203 is offered in a standard eight-pin small-outline surface-mount (D) package and is characterized for operation over the case temperature range of.
  • 40°C to 125°C. schematic DRAIN1 8 GATE2 3.