SLUS700D – MARCH 2006 – REVISED DECEMBER 2007
LOW PIN COUNT, LOW VIN (2.5 V TO 5.5 V) SYNCHRONOUS BUCK DC-TO-DC
CONTROLLER WITH ENABLE
•23 2.25-V to 5.5-V Input
• Output Voltage from 0.6 V to 90% of VIN
• High-Side Drive for N-Channel FET
• Supports Pre-Biased Outputs
• Adaptive Anti-Cross Conduction Gate Drive
• 1%, 0.6-V Reference
• Two Fixed Switching Frequency Versions,
TPS40040 (300 kHz) and TPS40041 (600 kHz)
• Three Selectable Short Circuit Protection
Levels of 105 mV, 180 mV and 310 mV
• Hiccup Restart from Faults
• Voltage Mode Control
• Active Low Enable
• Thermal Shutdown Protection at 145C
• 8-Pin, 3-mm x 3-mm SON with Ground
Connection to Thermal Pad
• Point of Load
• DC to DC Modules
• Set Top Boxes
The TPS40040 and TPS40041 dc-to-dc controllers
are designed to operate from a 2.25-V to 5.5-V input
source. To reduce the number of external
components, several operating parameters are fixed
internally; namely, frequency, soft start time, and
short circuit protection (SCP) levels. For example, the
operating frequencies of TPS40040/1 are 300
kHz/600 kHz, respectively.
SIMPLIFIED APPLICATION DIAGRAM
4 VDD GND LDRV 5
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Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
Predictive Gate Drive is a registered trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006–2007, Texas Instruments Incorporated