74AHC04-Q100 Description
74AHCT04-Q100 is a high-speed Si-gate CMOS device and is pin patible with Low-power Schottky TTL (LSTTL). It is specified in pliance with JEDEC standard No. 74AHCT04-Q100 provides six inverting buffers.
74AHC04-Q100 Key Features
- Automotive product qualification in accordance with AEC-Q100 (Grade 1)
- Specified from -40 °C to +85 °C and from -40 °C to +125 °C
- Balanced propagation delays
- Inputs accept voltages higher than VCC
- Input levels
- For 74AHC04-Q100: CMOS level
- For 74AHCT04-Q100: TTL level
- ESD protection
- MIL-STD-883, method 3015 exceeds 2000 V
- HBM JESD22-A114F exceeds 2000 V
74AHC04-Q100 Applications
- Automotive product qualification in accordance with AEC-Q100 (Grade 1)
- Specified from -40 °C to +85 °C and from -40 °C to +125 °C