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nexperia

74AHCT125D Datasheet Preview

74AHCT125D Datasheet

Quad buffer/line driver

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74AHC125; 74AHCT125
Quad buffer/line driver; 3-state
Rev. 5 — 12 June 2020
Product data sheet
1. General description
The 74AHC125; 74AHCT125 is a quad buffer/line driver with 3-state outputs controlled by the
output enable inputs (nOE). A HIGH on nOE causes the outputs to assume a high impedance
OFF-state. Inputs are overvoltage tolerant. This feature allows the use of these devices as
translators in mixed voltage environments.
2. Features and benefits
Wide supply voltage range from 2.0 V to 5.5 V
Overvoltage tolerant inputs to 5.5 V
High noise immunity
CMOS low power dissipation
Balanced propagation delays
All inputs have a Schmitt-trigger action
Input levels:
For 74AHC125: CMOS level
For 74AHCT125: TTL level
ESD protection:
HBM JESD22-A114E exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101C exceeds 1000 V
Latch-up performance exceeds 100 mA per JESD 78 Class II Level A
Multiple package options
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
Description
Version
74AHC125D
74AHCT125D
-40 °C to +125 °C SO14
plastic small outline package; 14 leads;
body width 3.9 mm
SOT108-1
74AHC125PW
74AHCT125PW
-40 °C to +125 °C TSSOP14 plastic thin shrink small outline package;
14 leads; body width 4.4 mm
SOT402-1
74AHC125BQ
74AHCT125BQ
-40 °C to +125 °C
DHVQFN14 plastic dual in-line compatible thermal
SOT762-1
enhanced very thin quad flat package; no leads;
14 terminals; body 2.5 × 3 × 0.85 mm




nexperia

74AHCT125D Datasheet Preview

74AHCT125D Datasheet

Quad buffer/line driver

No Preview Available !

Nexperia
4. Functional diagram
2 1A
1Y 3
1 1OE
5 2A
2Y 6
4 2OE
9 3A
3Y 8
10 3OE
12 4A
4Y 11
13 4OE
mna228
Fig. 1. Logic symbol
2
1
3
1
EN1
5
6
4
9
8
10
12
11
13
mna229
Fig. 2. IEC logic symbol
5. Pinning information
74AHC125; 74AHCT125
Quad buffer/line driver; 3-state
nA
nY
nOE
mna227
Fig. 3. Logic diagram (one buffer)
5.1. Pinning
74AHC125
74AHCT125
1OE 1
1A 2
1Y 3
2OE 4
2A 5
2Y 6
GND 7
14 VCC
13 4OE
12 4A
11 4Y
10 3OE
9 3A
8 3Y
001aae755
Fig. 4. Pin configuration SOT108-1 (SO14) and
SOT402-1 (TSSOP14)
74AHC125
74AHCT125
terminal 1
index area
1A 2
1Y 3
2OE 4
2A 5
2Y 6
GND(1)
13 4OE
12 4A
11 4Y
10 3OE
9 3A
001aah082
Fig. 5.
Transparent top view
(1) This is not a ground pin. There is no electrical or
mechanical requirement to solder the pad. In case
soldered, the solder land should remain floating or
connected to GND
Pin configuration SOT762-1 (DHVQFN14)
74AHC_AHCT125
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 12 June 2020
© Nexperia B.V. 2020. All rights reserved
2 / 15


Part Number 74AHCT125D
Description Quad buffer/line driver
Maker nexperia
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74AHCT125D Datasheet PDF






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