74ALVC74D Datasheet - nexperia

Dual D-type flip-flop

74ALVC74D Features

* Wide supply voltage range from 1.65 V to 3.6 V

* Complies with JEDEC standard:

* JESD8-7 (1.65 to 1.95 V)

* JESD8-5 (2.3 to 2.7 V)

* JESD8B (2.7 to 3.6 V)

* 3.6 V tolerant inputs/outputs

* CMOS low power consumption

* Direct interface

74ALVC74D General Description

The 74ALVC74 is a dual positive edge triggered, D-type flip-flop. It has individual data (nD) inputs, clock (nCP) inputs, set (nSD) and (nRD) inputs, and complementary nQ and nQ outputs. The set and reset are asynchronous active LOW inputs that operate independently of the clock input. Information o.

74ALVC74D Datasheet (253.90 KB)