74ALVCH16952DGG Datasheet - nexperia

16-bit registered transceiver

74ALVCH16952DGG Features

* CMOS low-power consumption

* Multibyte flow-through pinout architecture

* Low inductance, multiple center power and ground pins for minimum noise and ground bounce

* Direct interface with TTL levels

* Output drive capability 50 Ω transmission lines at 85 °C

74ALVCH16952DGG General Description

The 74ALVCH16952 consists of two sections, each containing a dual octal non-inverting registered transceiver. Two 8-bit back to back registers store data flowing in both directions between two bidirectional buses. Data applied to the inputs is entered and stored on the rising edge of the clock (nCP.

74ALVCH16952DGG Datasheet (185.39 KB)