low-power buffer.
* Wide supply voltage range from 0.8 V to 3.6 V
* High noise immunity
* CMOS low power dissipation
* Complies with JEDEC standards:
* JESD8-12 (0.8 V .
using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it .
The 74AUP1G07 is a single buffer with open-drain output.
Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.
This device ensures a very low static and dynamic power consumption across the entire VCC ra.
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