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74AUP2G00-Q100 - Low-power dual 2-input NAND gate

Description

The 74AUP2G00-Q100 provides dual 2-input NAND function.

Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.

Features

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1).
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C.
  • Wide supply voltage range from 0.8 V to 3.6 V.
  • High noise immunity.
  • Complies with JEDEC standards:.
  • JESD8-12 (0.8 V to 1.3 V).
  • JESD8-11 (0.9 V to 1.65 V).
  • JESD8-7 (1.2 V to 1.95 V).
  • JESD8-5 (1.8 V to 2.7 V).
  • JESD8-B (2.7 V to 3.6 V).
  • ESD protection:.
  • HBM JESD.

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Datasheet preview – 74AUP2G00-Q100

Datasheet Details

Part number 74AUP2G00-Q100
Manufacturer nexperia
File Size 218.76 KB
Description Low-power dual 2-input NAND gate
Datasheet download datasheet 74AUP2G00-Q100 Datasheet
Additional preview pages of the 74AUP2G00-Q100 datasheet.

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74AUP2G00-Q100 Low-power dual 2-input NAND gate Rev. 2 — 9 June 2022 Product data sheet 1. General description The 74AUP2G00-Q100 provides dual 2-input NAND function. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing a damaging backflow current through the device when it is powered down. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2.
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