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74HCT138PW Datasheet Preview

74HCT138PW Datasheet

3-to-8 line decoder/demultiplexer

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74HC138; 74HCT138
3-to-8 line decoder/demultiplexer; inverting
Rev. 8 — 7 April 2020
Product data sheet
1. General description
The 74HC138; 74HCT138 decodes three binary weighted address inputs (A0, A1 and A2) to
eight mutually exclusive outputs (Y0 to Y7). The device features three enable inputs (E1, E2 and
E3). Every output will be HIGH unless E1 and E2 are LOW and E3 is HIGH. This multiple enable
function allows easy parallel expansion to a 1-of-32 (5 to 32 lines) decoder with just four '138 ICs
and one inverter. The '138 can be used as an eight output demultiplexer by using one of the active
LOW enable inputs as the data input and the remaining enable inputs as strobes. Inputs include
clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in
excess of VCC.
2. Features and benefits
Complies with JEDEC standard no. 7A
Input levels:
For 74HC138: CMOS level
For 74HCT138: TTL level
Demultiplexing capability
Multiple input enable for easy expansion
Ideal for memory chip select decoding
Active LOW mutually exclusive outputs
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
Description
74HC138D
74HCT138D
-40 °C to +125 °C SO16
plastic small outline package; 16 leads;
body width 3.9 mm
74HC138DB
74HCT138DB
-40 °C to +125 °C
SSOP16
plastic shrink small outline package; 16 leads;
body width 5.3 mm
74HC138PW
74HCT138PW
-40 °C to +125 °C
TSSOP16 plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
74HC138BQ
74HCT138BQ
-40 °C to +125 °C
DHVQFN16 plastic dual in-line compatible thermal enhanced
very thin quad flat package; no leads; 16 terminals;
body 2.5 × 3.5 × 0.85 mm
Version
SOT109-1
SOT338-1
SOT403-1
SOT763-1




nexperia

74HCT138PW Datasheet Preview

74HCT138PW Datasheet

3-to-8 line decoder/demultiplexer

No Preview Available !

Nexperia
4. Functional diagram
1
2
3
4 E1
5 E2
6 E3
Fig. 1. Logic symbol
A0
Y0 15
A1
Y1 14
A2
Y2
13
Y3 12
Y4
11
Y5 10
Y6
9
Y7
7
mna370
A2
A1
A0
E1
E2
E3
Fig. 3. Logic diagram
74HC138; 74HCT138
3-to-8 line decoder/demultiplexer; inverting
1 A0
2 A1
3 A2
3-to-8
DECODER
ENABLE
EXITING
4 E1
5 E2
6 E3
Fig. 2. Functional diagram
Y7
Y6
Y5
Y4
Y3
Y2
Y1
Y0
001aae059
Y0 15
Y1 14
Y2 13
Y3 12
Y4 11
Y5 10
Y6 9
Y7 7
mna372
74HC_HCT138
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 7 April 2020
© Nexperia B.V. 2020. All rights reserved
2 / 16


Part Number 74HCT138PW
Description 3-to-8 line decoder/demultiplexer
Maker nexperia
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