74HC165; 74HCT165
8-bit parallel-in/serial out shift register
Rev. 6 — 23 April 2020
Product data sheet
1. General description
The 74HC165; 74HCT165 are 8-bit serial or parallel-in/serial-out shift registers. The device
features a serial data input (DS), eight parallel data inputs (D0 to D7) and two complementary
serial outputs (Q7 and Q7). When the parallel load input (PL) is LOW the data from D0 to D7 is
loaded into the shift register asynchronously. When PL is HIGH data enters the register serially at
DS. When the clock enable input (CE) is LOW data is shifted on the LOW-to-HIGH transitions of
the CP input. A HIGH on CE will disable the CP input. Inputs are overvoltage tolerant to 15 V. This
enables the device to be used in HIGH-to-LOW level shifting applications.
2. Features and benefits
• Asynchronous 8-bit parallel load
• Synchronous serial input
• Complies with JEDEC standard no. 7A
• Input levels:
• For 74HC165: CMOS level
• For 74HCT165: TTL level
• ESD protection:
• HBM JESD22-A114F exceeds 2000 V
• MM JESD22-A115-A exceeds 200 V
• Specified from -40 °C to +85 °C and from -40 °C to +125 °C
3. Applications
• Parallel-to-serial data conversion
4. Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name
Description
74HC165D
74HCT165D
-40 °C to +125 °C SO16
plastic small outline package; 16 leads;
body width 3.9 mm
74HC165DB
74HCT165DB
-40 °C to +125 °C
SSOP16
plastic shrink small outline package; 16 leads;
body width 5.3 mm
74HC165PW
74HCT165PW
-40 °C to +125 °C
TSSOP16 plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
74HC165BQ
74HCT165BQ
-40 °C to +125 °C
DHVQFN16 plastic dual in-line compatible thermal enhanced
very thin quad flat package; no leads; 16 terminals;
body 2.5 × 3.5 × 0.85 mm
Version
SOT109-1
SOT338-1
SOT403-1
SOT763-1