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74LV138D - 3-to-8 line decoder/demultiplexer

This page provides the datasheet information for the 74LV138D, a member of the 74LV138 3-to-8 line decoder/demultiplexer family.

Description

The 74LV138 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7).

Features

  • Wide supply voltage range from 1.0 to 5.5 V.
  • Optimized for low voltage.

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Datasheet preview – 74LV138D

Datasheet Details

Part number 74LV138D
Manufacturer nexperia
File Size 251.42 KB
Description 3-to-8 line decoder/demultiplexer
Datasheet download datasheet 74LV138D Datasheet
Additional preview pages of the 74LV138D datasheet.

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Full PDF Text Transcription

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74LV138 3-to-8 line decoder/demultiplexer; inverting Rev. 6 — 22 July 2021 Product data sheet 1. General description The 74LV138 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The 74LVC138A features three enable inputs (Y1, Y2 and E3). Every output will be HIGH unless Y1 and Y2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion of the 74LV138 to a 1-of-32 (5 to 32 lines) decoder with just four 74LV138 ICs and one inverter. The 74LV138 can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Inputs include clamp diodes.
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