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74LVCH16374A-Q100 - 16-bit edge-triggered D-type flip-flop

Download the 74LVCH16374A-Q100 datasheet PDF (74LVC16374A-Q100 included). The manufacturer datasheet provides complete specifications, pinout details, electrical characteristics, and typical applications for 16-bit edge-triggered d-type flip-flop.

Description

The 74LVC16374A-Q100; 74LVCH16374A-Q100 is a 16-bit edge-triggered D-type flip-flop with 3-state outputs.

The device can be used as two 8-bit flip-flops or one 16-bit flip-flop.

Features

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1).
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C.
  • Overvoltage tolerant inputs to 5.5 V.
  • Wide supply voltage range from 1.2 V to 3.6 V.
  • CMOS low power dissipation.
  • Multibyte flow-through standard pinout architecture.
  • Low inductance multiple supply pins for minimum noise and ground bounce.
  • Direct interface with TTL levels.
  • All data inpu.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (74LVC16374A-Q100-nexperia.pdf) that lists specifications for multiple related part numbers.

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Full PDF Text Transcription

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74LVC16374A-Q100; 74LVCH16374A-Q100 16-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state Rev. 3 — 27 September 2021 Product data sheet 1. General description The 74LVC16374A-Q100; 74LVCH16374A-Q100 is a 16-bit edge-triggered D-type flip-flop with 3-state outputs. The device can be used as two 8-bit flip-flops or one 16-bit flip-flop. The device features two clocks (1CP and 2CP) and two output enables (1OE and 2OE), each controlling 8-bits. The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (nCP) transition. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. Operation of the nOE input does not affect the state of the flip-flops . Inputs can be driven from either 3.
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