HEF4040B-Q100 Description
The HEF4040B-Q100 is a 12-stage binary ripple counter with a clock input (CP), an overriding asynchronous master reset input (MR) and twelve fully buffered outputs (Q0 to Q11). The counter advances on the HIGH-to-LOW transition of CP. A HIGH on MR clears all counter stages and forces all outputs LOW, independent of CP.
HEF4040B-Q100 Key Features
- Automotive product qualification in accordance with AEC-Q100 (Grade 3)
- Specified from 40 C to +85 C
- Tolerant of slow clock rise and fall time
- Fully static operation
- 5 V, 10 V, and 15 V parametric ratings
- Standardized symmetrical output characteristics
- ESD protection
- MIL-STD-883, method 3015 exceeds 2000 V
- HBM JESD22-A114F exceeds 2000 V
- MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
HEF4040B-Q100 Applications
- Automotive product qualification in accordance with AEC-Q100 (Grade 3) Specified from 40 C to +85 C