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HEF4543BT - BCD to 7-segment latch/decoder/driver

Download the HEF4543BT datasheet PDF. This datasheet also covers the HEF4543B variant, as both devices belong to the same bcd to 7-segment latch/decoder/driver family and are provided as variant models within a single manufacturer datasheet.

Description

The HEF4543B is a BCD to 7-segment latch/decoder/driver for liquid crystal and LED displays.

It has four address inputs (D0 to D3), an active LOW latch enable input (LE), an active HIGH blanking input (BL), an active HIGH phase input (PH) and seven buffered segment outputs (Qa to Qg).

Features

  • Wide supply voltage range from 3.0 V to 15.0 V.
  • CMOS low power dissipation.
  • High noise immunity.
  • Fully static operation.
  • 5 V, 10 V, and 15 V parametric ratings.
  • Standardized symmetrical output characteristics.
  • Complies with JEDEC standard JESD 13-B.
  • ESD protection:.
  • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V.
  • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V.
  • Specified from -40 °C to +85.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (HEF4543B-nexperia.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number HEF4543BT
Manufacturer Nexperia
File Size 285.52 KB
Description BCD to 7-segment latch/decoder/driver
Datasheet download datasheet HEF4543BT Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
HEF4543B BCD to 7-segment latch/decoder/driver Rev. 9 — 15 August 2024 Product data sheet 1. General description The HEF4543B is a BCD to 7-segment latch/decoder/driver for liquid crystal and LED displays. It has four address inputs (D0 to D3), an active LOW latch enable input (LE), an active HIGH blanking input (BL), an active HIGH phase input (PH) and seven buffered segment outputs (Qa to Qg). The circuit provides the function of a 4-bit storage latch and an 8-4-2-1 BCD to 7-segment decoder/driver. It can invert the logic levels of the output combination. The phase (PH), blanking (BL) and latch enable (LE) inputs are used to reverse the function table phase, blank the display and store a BCD code, respectively.
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