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8-Output Ultra-Low Additive Jitter Differential Clock Buffer/Level Translator
US5D308
Datasheet
Description
The US5D308 is a 2.1-Ghz,8-output differential high-performance clock fanout buffer.
The input clock can be selected from two differential inputs or one crystal input. The selected input clock is distributed to two banks of 4 differential outputs and one LVCMOS output. Both differential output banks can be independently configured as LVPECL,LVDS,or HCSL drivers,or disabled.The LVCMOS output has a synchronous enable input for runt-pulse-free operation when enabled or disabled. The outputs are at a defined level when inputs are open.
The internal oscillator circuit is automatically disabled if the crystal input is not selected. The crystal pin can be driven by a single-ended clock.
US5D308 Datasheet
