US5D304 Datasheet | ultrasilicon

4-Output Ultra-Low Additive Jitter Differential Clock Buffer/Level Translator Description The US5D304 is a 2.1-GHz,4-output differential high-performance clock fanout buffer. The input clock can be selected from two differential inputs or one crystal input. The selected input clock is distributed to two banks of 2 differential outputs and one LVCMOS output. Output banks can be configured as LVPECL,LVDS,or HCSL drivers,or disabled.The LVCMOS output has a synchronous enable input for runt-pulse-free operation when enabled or disabled. The outputs are at a defined level when inputs are open. The internal oscillator circuit is automatically disabled if the crystal input is...