Datasheet Details
| Part number | US5D308 |
|---|---|
| Manufacturer | ultrasilicon |
| File Size | 912.42 KB |
| Description | 8-Output Ultra-Low Additive Jitter Differential Clock Buffer/Level Translator |
| Datasheet |
 US5D308 Datasheet
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General Description
The US5D308 is a 2.1-Ghz,8-output differential high-performance clock fanout buffer.
The input clock can be selected from two differential inputs or one crystal input.
The selected input clock is distributed to two banks of 4 differential outputs and one LVCMOS output.
Key Features
- Two differential reference clock input pairs.
- Differential input pairs can accept the following differential input levels: LVPECL, LVDS, HCSL, HSTL or Single Ended.
- Crystal Input accepts 10MHz to 40MHz Crystal or Single Ended Clock.
- Maximum Output Frequency LVPECL - 2.1GHz LVDS - 2.1GHz HCSL - 250MHz LVCMOS - 250MHz.
- Two banks, each has four differential output pairs that can be configured as LVPECL or LVDS or HCSL or HiZ.
- One single-ended r.