Description
Generates up to eighteen low-skew, non-inverting clocks from one clock input Supports up to four SDRAM DIMMs 2 Uses either I C™-bus or SMBus serial interface with Read and Write capability for individual clock output control Output enable pin tristates all clock outputs to facilitate board testing Clock outputs skew-matched to less than 250ps Less than 5ns propagation delay Output impedance: 17Ω at 0.5VDD Serial interface I/O meet I C specifications; all other I/O are LVTTL/LVCM
Features
