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LP62S16128U-70LLT - 128K X 16 BIT LOW VOLTAGE CMOS SRAM

Description

The LP62S16128-T is a low operating current 2,097,152bit static random access memory organized as 131,072 words by 16 bits and operates on low power voltage from 2.7V to 3.3V.

It is built using AMIC's high performance CMOS process.

Features

  • n Operating voltage: 2.7V to 3.3V n Access times: 70 ns (max. ) n Current: Very low power version: Operating: 35mA (max. ) Standby: 10µA (max. ) n n n n n Full static operation, no clock or refreshing required All inputs and outputs are directly TTL-compatible Common I/O using three-state output Data retention voltage: 2V (min. ) Available in 44-pin TSOP and 48-ball CSP (6 x 8 mm) packages General.

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Datasheet Details

Part number LP62S16128U-70LLT
Manufacturer AMIC Technology
File Size 158.24 KB
Description 128K X 16 BIT LOW VOLTAGE CMOS SRAM
Datasheet download datasheet LP62S16128U-70LLT Datasheet

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Part Number Description
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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LP62S16128-T Series 128K X 16 BIT LOW VOLTAGE CMOS SRAM Features n Operating voltage: 2.7V to 3.3V n Access times: 70 ns (max.) n Current: Very low power version: Operating: 35mA (max.) Standby: 10µA (max.) n n n n n Full static operation, no clock or refreshing required All inputs and outputs are directly TTL-compatible Common I/O using three-state output Data retention voltage: 2V (min.) Available in 44-pin TSOP and 48-ball CSP (6 x 8 mm) packages General Description The LP62S16128-T is a low operating current 2,097,152bit static random access memory organized as 131,072 words by 16 bits and operates on low power voltage from 2.7V to 3.3V. It is built using AMIC's high performance CMOS process.
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