Description
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This document is primarily concerned with the PowerPC™ PC7457; however, unless otherwise noted, all information here also applies to the PC7447.
Features
* 3000 Dhrystone 2.1 MIPS at 1.3 GHz Selectable Bus Clock (30 CPU Bus Dividers up to 28x) 13 Selectable Core-to-L3 Frequency Divisor
Applications
* The PC7457 consists of a processor core, a 512 Kbyte L2, and an internal L3 tag and controller which support a glueless backside L3 cache through a dedicated high-bandwidth interface. The PC7447 is identical to the PC7457 except it does not support the L3 cache interface. The core is a high-perform
