M1543C - South Bridge

Datasheet Details

T Provides a highly integrated bridge (with Super I/O & Fast IR) between PCI and ISA bus for both Pentium and Pentium II systems T PCI 3.3V/5V Tolerance Interface.
Supports PCI Master and Slave Interface.
Supports PCI Master and Slave Initiated Termination.
Concurrent PCI Architecture.
PCI spec. 2.1 Compliant (Delayed Transaction & Passive Release Support) T Buffers Control.
8-byte Bi-directional Line Buffers for DMA/ISA Memory Read/Write Cycles to PC.

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Published: Jan 30, 2025 |