Click to expand full text
Preliminary Data Sheet May 2001
TMXF28155 Super Mapper 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
1 Features
s
1.2 STS/STM Pointer Interpreter
s s
Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3/E3, DS2, T1/E1/J1, and DS0/E0/J0 applications. Implementation supports both linear (1 + 1, unprotected) and ring (UPSR) network topologies. Provides full termination of up to 21 E1, 28 T1, or 28 J1. Low power 3.3 V supply. –40 °C to +85 °C industrial temperature range. 456-pin ball grid array (PBGA) package. Complies with Bellcore*, ITU, ANSI †, ETSI and Japanese TTC standards: GR-253-CORE, GR-499, (ATT) TR-62411, ITU-T G.707, G.704, G.706, G.783, G.962, G.964, G.965, Q.542, T1.105, JT-G704, JT-G706, JT-G707, JT-I431-a, ETS 300 417-1-1, ETS 300 011, T1.107, T1.404.