A6A259KLB Datasheet - Allegro MicroSystems

A6A259KLB 8-BIT ADDRESSABLE DMOS POWER DRIVER

and INPUT REQUIREMENTS ENABLE Four modes of operation are selectable by controlling the CLEAR and ENABLE inputs as shown above. 50% DATA t PLH ADDRESSED OUTPUT t PHL 90% 10% In the addressable-latch mode, data at the DATA input is written into the addressed transparent latch. The addressed ou.

6A259 ADVANCE INFORMATION (Subject to change without notice) March 22, 2000 8-BIT ADDRESSABLE DMOS POWER DRIVER The A6A259KA and A6A259KLB combine a 3-to-8 line CMOS decoder and accompanying data latches, control circuitry, and DMOS outputs in a multi-functional power driver capable of storing single-line data in the addressable latches or use as a decoder or demuliplexer. Driver applications include relays, solenoids, and other medium-current or high-voltage peripheral power loads. The CMOS in.

A6A259KLB Features

* I 50 V Minimum Output Clamp Voltage I 350 mA Output Current (all outputs simultaneously) I 1 Ω Typical rDS(on) I Internal Short-Circuit Protection I Low Power Consumption I Replacements for TPIC6A259N and TPIC6A259DW Always order by complete part number: Part Number Package RθJA A6A259KA 20-pin DIP

A6A259KLB Datasheet (205.07 KB)