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UCN5881 BiMOS II DUAL 8-BIT LATCHED DRIVER WITH READ BACK

UCN5881 Description

5881 BiMOS II DUAL 8-BIT LATCHED DRIVER 5881 BiMOS II DUAL 8-BIT LATCHED DRIVER WITH READ BACK With 16 CMOS data latches (two sets of eight), CMOS co.

UCN5881 Features

* s s s s s s 4.4 MHz Minimum Data-Input Rate Low-Power CMOS Logic 20 V, 50 mA (Max. ) Outputs Transient-Protected Outputs Thermal Shutdown Protection Low-Profile Leaded Chip Carrier Always order by complete part number: UCN5881EP . 5881 BiMOS II DUAL 8-BIT LATCHED DRIVER FUNCTIONAL BLOCK DIAGRAM

UCN5881 Applications

* and allows the system to verify that data has been received and latched. TIMING CONDITIONS (VDD = 5.0 V, Logic Levels are VDD and Ground) A. Minimum Data Active Time Before Strobe Enabled (Data Set-Up Time)
* 50 ns B. Minimum Data Active

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Datasheet Details

Part number
UCN5881
Manufacturer
Allegro
File Size
79.48 KB
Datasheet
UCN5881_Allegro.pdf
Description
BiMOS II DUAL 8-BIT LATCHED DRIVER WITH READ BACK

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Allegro UCN5881-like datasheet