AS7C1026C Datasheet, Sram, Alliance Semiconductor

AS7C1026C Features

• Sram
• JEDEC standard packaging
• ESD protection > _ 2000 volts - 44-pin 400 mil SOJ - 44-pin TSOP 2-400 Pin arrangement 44-Pin SOJ (400 mil), TSOP 2 A4 A3 A2 A1 A0 CE I/O0

PDF File Details

Part number:

AS7C1026C

Manufacturer:

Alliance Semiconductor

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287.41kb

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📄 Datasheet

Description:

5v 64k x 16 cmos sram. A write cycle is accomplished by asserting write enable (WE) and chip enable (CE). Data on the input pins I/O0 through I/O15 is writ

AS7C1026C Application

• Applications When CE is high, the device enters standby mode. If inputs are still toggling, the device will consume ISB power. If the bus is static

TAGS

AS7C1026C

Alliance Semiconductor

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