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AS7C34096LL Low Power CMOS SRAM

AS7C34096LL Description

$GYDQFHLQIRUPDWLRQ )HDWXUHV * * * * * w w w Organization: 524,288 words × 8 bits Intelliwatt™ active po.

AS7C34096LL Features

* FRQWUROOHG tWP WE tWZ Din Dout tDW Data valid tDH ','      $      $//,$1&(6(0,&21'8&725  $6&// ® $GYDQFHLQIRUPDWLRQ 'DWDUHWHQWLRQFKDUDFWHULVWLFV Parameter VDD for data retention Data retention current Operation recovery time Symbol VDR ICCDR tR Test c

AS7C34096LL Applications

* where fast data access, long battery life, and simple interfacing are desired. 65$0 Equal address access and cycle times (tAA, tRC, tWC) of 25/35/55/70/100 ns with output enable access times (tOE) of 10 ns are ideal for high performance applications. Active high and low chip enables (CE) permit ea

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Low Power CMOS SRAM Alliance Semiconductor
Alliance Semiconductor AS7C34096LL-like datasheet