AS7C33128FT18B Datasheet (Alliance Semiconductor Corporation) - 3.3V 128K x 18 Flow Through Synchronous SRAM

AS7C33128FT18B, 3.3V 128K x 18 Flow Through Synchronous SRAM

The AS7C33128FT18B is a high-performance CMOS 2-Mbit synchronous Static Random Access Memory (SRAM) device organized as 131,072 words × 18 bits.

Fast cycle times of 7.5/8.5/10/12 ns with clock access times (tCD) of 6.5/7.5/8.0/10 ns.

Three chip enable (CE) inputs permit easy memory expansion.

Burst

AS7C33128FT18B Features

* Organization: 131,072 words × 18 bits Fast clock to data access: 6.5/7.5/8.0/10.0 ns Fast OE access time: 3.5/4.0 ns Fully synchronous flow through operation Asynchronous output enable control Economical 100-pin TQFP pac