AS7C33128NTF18B Datasheet (Alliance Semiconductor Corporation) - 3.3V 128K x 18 Flowthrough Synchronous SRAM

AS7C33128NTF18B, 3.3V 128K x 18 Flowthrough Synchronous SRAM

The AS7C33128NTF18B family is a high performance CMOS 2 Mbit synchronous Static Random Access Memory (SRAM) organized as 131,072 words × 18 bits and incorporates a LATE Write.

This variation of the 2Mb+ synchronous SRAM uses the No Turnaround Delay (NTD™) architecture, featuring an enhanced write op

AS7C33128NTF18B Features

* Organization: 131,072 words × 18 bits NTD™ architecture for efficient bus operation Fast clock to data access: 7.5/8.0/10.0 ns Fast OE access time: 3.5/4.0 ns Fully synchronous operation Flow-through mode Asynchronous ou