AS7C33128NTD36A, AS7C33128NTD32A Datasheet (Alliance Semiconductor)

AS7C33128NTD36A, AS7C33128NTD32A, 3.3V 128K X 32/36 SRAM

The AS7C33128NTD36A family is a high performance CMOS 4-Mbit synchronous Static Random Access Memory (SRAM) device organized as 131,072 words × 32 or 36 bits that incorporates a LATE LATE Write.

This variation of the 4Mb sychronous SRAM uses the No Turnaround Delay (NTD) architecture, featuring an e

AS7C33128NTD36A Features

* Organization: 131,072 words × 32 or 36 bits NTD™1 architecture for efficient bus operation

* Fast clock speeds to 166 MHz in LVTTL/LVCMOS

* Fast clock to data access: 3.5/4.0/5.0 ns

* Fast OE access time: 3.5/4.0/5.0 ns

* Fully synchronous operation