AS7C33128NTD32A Datasheet - Alliance Semiconductor

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AS7C33128NTD32A 3.3V 128K X 32/36 SRAM

December 2002 AS7C33128NTD32A AS7C33128NTD36A * 9 .î 65$0 ZLWK 17'TM .
The AS7C33128NTD36A family is a high performance CMOS 4-Mbit synchronous Static Random Access Memory (SRAM) device organized as 131,072 words × 32 or.

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Datasheet Details

Part number:

AS7C33128NTD32A

Manufacturer:

Alliance Semiconductor

File Size:

161.42 KB

Description:

3.3V 128K X 32/36 SRAM

Features

* Organization: 131,072 words × 32 or 36 bits NTD™1 architecture for efficient bus operation
* Fast clock speeds to 166 MHz in LVTTL/LVCMOS
* Fast clock to data access: 3.5/4.0/5.0 ns
* Fast OE access time: 3.5/4.0/5.0 ns
* Fully synchronous operation

Applications

* requiring random access or read-modify-write operations. NTD devices use the memory bus more efficiently by introducing a write latency that matches the two-cycle pipelined or one-cycle flowthrough read latency. Write data is applied two cycles after the write command and address, allowing the read

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AS7C33128NTD32A 3.3V 128K SRAM Alliance Semiconductor

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