AD6634 Datasheet | Analog Devices

FEATURES 80 MSPS Wideband Inputs (14 Linear Bits Plus Three RSSI) Processes Two WCDMA Channels (UMTS or CDMA2000 1؋) or Four GSM/EDGE, IS136 Channels Four Independent Digital Receivers in a Single Package Dual 16-Bit Parallel Output Ports Dual 8-Bit Link Ports Programmable Digital AGC Loops with 96 d B Range Digital Resampling for Noninteger Decimation Rates Programmable Decimating FIR Filters Interpolating Half-Band Filters Programmable Attenuator Control for Clip Prevention and External Gain Ranging via Level Indicator Flexible Control for Multicarrier and Phased Array 3.3 V I/O, 2.5 V CMOS Core User Configurable Built-In Self-Test (BIST) Capability JTAG Boundary Scan 80 MSPS, Dual-Channel WCDMA Receive Signal Processor (RSP) AD6634 APPLICATIONS Multicarrier, Multimode Digital Receivers GSM, IS136, EDGE, PHS, IS95, UMTS, CDMA2000 Micro and Pico Cell Systems, Software Radios Wireless Local Loop Smart Antenna Systems In Building Wireless Telephony FUNCTIONAL BLOCK DIAGRAM r CIC2 CIC5 RESAMPLER INA[13:0] EXPA[2:0] IENA LIA-A LIA-B RAM COEFFICIENT FILTER CHANNEL 0 RCF OUTPUTS CHANNELS 0, 1, 2, 3 PORT A LINK PORT OR PARALLEL PORT NCO RAM COEFFICIENT FILTER CHANNEL 1 NCO RAM COEFFICIENT FILTER CHANNEL 2 NCO RAM COEFFICIENT FILTER CHANNEL 3 NCO JTAG EXTERNAL SYNC. CIRCUIT BUILT-IN (BIST) SELF-TEST CIRCUITRY MICROPORT OR SERIAL PORT CONTROL RCF OUTPUTS CHANNELS 0, 1, 2, 3 INTERPOLATING HALF-BAND FILTER PLUS DIGITAL AGC r CIC2 CIC5 RESAMPLER I N P U T M A T R I X OUTPUT MUX CIRCUITRY r CIC2 CIC5 RESAMPLER INTERPOLATING HALF-BAND FILTER PLUS DIGITAL AGC PORT B LINK PORT OR PARALLEL PORT INB[13:0] EXPB[2:0] IENB r CIC2 CIC5 RESAMPLER LIB-A LIB-B SYNCA SYNCB SYNCC SYNCD REV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or...