AD722 Datasheet | Analog Devices

a Features Low Cost, Integrated Solution +5 V Operation Accepts FSC Clock or Crystal, or 4FSC Clock posite Video and Separate Y/C (S-Video) Outputs Minimal External ponents: No External Filters or Delay Lines Required Onboard DC Restoration Accepts Either HSYNC & VSYNC or CSYNC Phase Lock to External Subcarrier Drives 75 Ω Reverse-Terminated Loads Logic Selectable NTSC or PAL Encoding Modes pact 16-Pin SOIC APPLICATIONS RGB to NTSC or PAL Encoding RGB to NTSC/PAL Encoder AD722 The AD722 accepts either FSC or 4FSC clock. When a clock is not available, a low cost parallel-resonant crystal (3.58 MHz (NTSC) or 4.43 MHz (PAL)) and the AD722’s on-chip oscillator generate the necessary subcarrier clock. The AD722 also accepts the subcarrier clock from an external video source. The interface to VGA Controllers and MPEG Video Decoders is simple: an on-chip logic “XNOR” accepts the available vertical (VSYNC) and horizontal sync (HSYNC) signals and creates the posite sync (CSYNC) signal on-chip. If available, the AD722 will also accept a standard CSYNC signal by connecting VSYNC to +5 V and applying CSYNC to HSYNC pin. The AD722 contains decoding logic to identify valid HSYNC pulses for correct burst insertion. Delays in the U and V chroma filters are matched by an on-chip sampled-data delay line in the Y signal path. To prevent aliasing, a prefilter at 5 MHz is included ahead of the delay line and a post-filter at 5 MHz is added after the delay line to suppress harmonics in the output. These low-pass filters are optimized for minimum pulse overshoot. The overall luma delay, relative to chroma, has been designed to be 170 ns, which prepensates for delays in the filters used in the IF section of a television receiver. This prepensation delay is already present in TV broadcasts. The AD722 es in a space-saving SOIC and is specified for the 0°C to +70°C mercial temperature range. PRODUCT DESCRIPTION The AD722 is a low cost RGB to NTSC/PAL Encoder that...