AD724 Datasheet | Analog Devices

FEATURES Low Cost, Integrated Solution +5 V Operation Accepts FSC Clock or Crystal, or 4FSC Clock posite Video and Separate Y/C (S-Video) Outputs Luma and Chroma Outputs Are Time Aligned Minimal External ponents: No External Filters or Delay Lines Required Onboard DC Clamp Accepts Either HSYNC and VSYNC or CSYNC Phase Lock to External Subcarrier Drives 75 ⍀ Reverse-Terminated Loads Logic Selectable NTSC or PAL Encoding Modes pact 16-Lead SOIC APPLICATIONS RGB to NTSC or PAL Encoding PRODUCT DESCRIPTION RGB to NTSC/PAL Encoder AD724 operates from a single +5 V supply. No external delay lines or filters are required. The AD724 may be powered down when not in use. The AD724 accepts either FSC or 4FSC clock. When a clock is not available, a low cost parallel-resonant crystal (3.58 MHz (NTSC) or 4.43 MHz (PAL)) and the AD724’s on-chip oscillator generate the necessary subcarrier clock. The AD724 also accepts the subcarrier clock from an external video source. The interface to graphics controllers is simple: an on-chip logic “XNOR” accepts the available vertical (VSYNC) and horizontal sync (HSYNC) signals and creates the posite sync (CSYNC) signal on-chip. If available, the AD724 will also accept a standard CSYNC signal by connecting VSYNC to Logic HI and applying CSYNC to the HSYNC pin. The AD724 contains decoding logic to identify valid horizontal sync pulses for correct burst insertion. Delays in the U and V chroma filters are matched by an on-chip sampled-data delay line in the Y signal path. To prevent aliasing, a prefilter at 5 MHz is included ahead of the delay line and a post-filter at 5 MHz is added after the delay line to suppress harmonics in the output. These low-pass filters are optimized for minimum pulse overshoot. The overall luma delay, relative to chroma, has been designed to be time aligned for direct input to a television’s baseband. The AD724 es in a space-saving SOIC and is specified for the 0°C to +70°C mercial temperature range. The AD724 is a...