AD7625 Datasheet | Analog Devices

.. Preliminary Technical Data Features Throughput: 6 MSPS SAR architecture 16-bit resolution with no missing codes SNR: 92 dB Typ, 90dB Min @ 1MHz INL: ±1 LSB Typ, ±2 LSB Max DNL: ±0.3 LSB Typ, ±1 LSB Max Differential input range: ± 4.096V No latency/no pipeline delay (SAR architecture) Serial LVDS interface: Self-clocked mode Echoed-clock mode Reference: Internal 4.096 V External (1.2V) buffered to 4.096 V External 4.096 V Power dissipation 150 mW 32-Lead LFCSP package (5 mm x 5 mm) 16-Bit, 6MSPS PulSAR Differential ADC AD7625 FUNCTIONAL BLOCK DIAGRAM REFIN REF VCM 1.2V BANDGAP IN+ INCAP DAC CLOCK LOGIC D AD7626 SAR SERIAL LVDS DCO CLK Figure...