HMC6832 Datasheet (Analog Devices) - 2:8 Differential Fanout Buffer

HMC6832, 2:8 Differential Fanout Buffer

The HMC6832 is an input selectable, 2:8 differential fanout buffer designed for low noise clock distribution.

The IN_SEL control pin selects one of the two differential inputs.

This input is then buffered to all eight differential outputs.

The low jitter outputs of the HMC6832 lead to synchronized l

HMC6832 Features

* Ultralow noise floor:

* 165.9 dBc/Hz or

* 165.2 dBc/Hz (LVPECL or LVDS) at 2000 MHz Configurable to LVPECL or pseudo LVDS outputs 2.5 V or 3.3 V LVPECL operation (LVDS 2.5 V only) Wideband: 10 MHz to 3500 MHz operating frequency range Flexible input interface LVPECL, LVDS, CML, and CMO