Datasheet Details
- Part number
- HMC987LP5E
- Manufacturer
- Analog Devices ↗
- File Size
- 1.64 MB
- Datasheet
- HMC987LP5E-AnalogDevices.pdf
- Description
- LOW NOISE 1:9 FANOUT BUFFER
HMC987LP5E Description
Clock Distribution - SMT v03.1112 Typical Applications The is suitable for: * SONET, Fibre Channel, GigE Clock Distribution * ADC/DAC.
The 1-to-9 fanout buffer is designed for low noise clock distribution.
HMC987LP5E Features
* Ultra Low Noise Floor: -166 dBc/Hz @ 2 GHz Wideband: DC - 8 GHz Operating Frequency Flexible Input Interface:
LVPECL, LVDS, CML, CMOS Compatible AC or DC Coupling On-Chip Termination 50 or 150 Ω (100/300 Ω Diff. ) Multiple Output Drivers: Up to 8 Differential or 16 Single-Ended LVPECL Outputs:
800 mV
HMC987LP5E Applications
* The is suitable for:
* SONET, Fibre Channel, GigE Clock Distribution
* ADC/DAC Clock Distribution
* Low Skew and Jitter Clock or Data Fanout
* Wireless/Wired Communications
* Level Translation
* High Performance Instrumentation
* Medical Imagin
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