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PKD01 Monolithic Peak Detector with Reset-and-Hold Mode

PKD01 Description

.a U 4 .D at h S a t e e m o c Monolithic Peak Detector with Reset-and-Hold Mode PKD01 FUNCTIONAL BLOCK DIAGRAM +IN *IN OUTPUT V+ V .
The PKD01 tracks an analog input signal until a maximum amplitude is reached.

PKD01 Features

* Monolithic Design for Reliability and Low Cost High Slew Rate: 0.5 V/␮ s Low Droop Rate TA = 25؇ C: 0.1 mV/ms T A = 125؇ C: 10 mV/ms Low Zero-Scale Error: 4 mV Digitally Selected Hold and Reset Modes Reset to Positive or Negative Voltage Levels Logic Signals TTL and CMOS Compatible Uncommitted Compa

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Monolithic Peak Detector with Reset-and-Hold Mode Analog Devices
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